AMD And Hynix Jointly Working On HBM 3D Stacked Memory Development

AMD and memory manufacturer SK Hynix announced that they are working on the development of next-generation high-bandwith 3D Stacked memory products and solutions to counter the the need of bandwith in APUs and GPUs, which requires bandwidth output from the memory to sustain the workload.


You might be wondering about what’s so special about 3D memory. To start off the die stacking mainly involves stacked on top of each other in a single die with 3D layering. Not only does this help reduce power consumption, but it considerably reduces the size as well. The 3D Stacked memory solution is nothing new of the sort, and has already started making it’s way into FPGAs and Image sensors, yet the mainstream and high-end market remains stripped of it. Acknowledging the fact, AMD’s 3D program manager, Bryan Black says:

 “..there is nothing yet in mainstream computing CPUs, GPUs or APUs” but that “HBM (high bandwidth memory) will change this.”  

“Getting 3D going will take a BOLD move and AMD is ready to make that move.” Black announced that AMD is co-developing HBM with SK Hynix which is currently sampling the HBM memory stacks and that AMD “…is ready to work with customers.”

The 3D Stacked memory would be a High Bandwith Memory, which as said before helps reduces power consumption and size. The interesting part about it, is that, it will be faster than any GDDR5 chip around the market right now. Principle engineer at Hynix, Minsuk Suh indicated that the first application for HBM would be GPUs, followed by networking and HPC applications.


Since GPU’s will be the first to recieve the 3D Stacked memory treatment, we cannot think of a better contender than Nvidia’s Volta, said to arrive in 2016 and Nvidia’s first consumer product to feature Stacked memory with a whooping bandwith of 1TB/s. For comparison’s sake, Nvidia’s current flagship, the GTX 780Ti has a 336GB/s bandwith. As far as AMD is concerned, their next-gen 20nm GPU’s codenamed ‘Pirate Islands’ could feature the Stacked memory architecture but there is no report to confirm it. The APU lineup will extend their DDR3 support until ‘Carrizo‘ arrives in 2015, so it’s most likely Carrizo’s successor ‘Basilisk’ will feature the Stacked memory architecture. The HBM will also help the Radeon IGP inside the APU’s to provide higher-bandwith.

We are still quite far away from seeing Stacked memory architecture on these markets, closest is 2016. Regardless, it will be interesting to see how manufacturers implement it.

Source: Electroiq

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